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Toolflows for Mapping Convolutional Neural Networks on FPGAs (arxiv.org)
2 points by godelmachine on Mar 19, 2018 | hide | past | pdf | discuss on HN

In plain words: It compares the tools that turn image-recognition networks into programs for reconfigurable chips, checking what each supports, how it builds the hardware, and how fast it runs. It also proposes one shared way to test these tools, since each is judged by its own rules.

Abstract · Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions

In the past decade, Convolutional Neural Networks (CNNs) have demonstrated state-of-the-art performance in various Artificial Intelligence tasks. To accelerate the experimentation and development of CNNs, several software frameworks have been released, primarily targeting power-hungry CPUs and GPUs. In this context, reconfigurable hardware in the form of FPGAs constitutes a potential alternative platform that can be integrated in the existing deep learning ecosystem to provide a tunable balance between performance, power consumption and programmability. In this paper, a survey of the existing CNN-to-FPGA toolflows is presented, comprising a comparative study of their key characteristics which include the supported applications, architectural choices, design space exploration methods and achieved performance. Moreover, major challenges and objectives introduced by the latest trends in CNN algorithmic research are identified and presented. Finally, a uniform evaluation methodology is proposed, aiming at the comprehensive, complete and in-depth evaluation of CNN-to-FPGA toolflows.

Stylianos I. Venieris, Alexandros Kouris, Christos-Savvas Bouganis
arXiv:1803.05900 · cs.CV, cs.AR, cs.LG · submitted Mar 15, 2018
abstract · pdf · html · Accepted for publication at the ACM Computing Surveys (CSUR) journal, 2018

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