about
Low Power Artificial Neural Network Architecture (arxiv.org)
3 points by godelmachine on Apr 5, 2019 | hide | past | pdf | discuss on HN

In plain words: A chip design stores each connection's weight in tiny resistors arranged in a grid, letting inputs multiply weights as currents. Instead of power-hungry converters that add those currents, one magnetic device per two columns does the adding, cutting power use significantly.

Abstract

Recent artificial neural network architectures improve performance and power dissipation by leveraging resistive devices to store and multiply synaptic weights with input data. Negative and positive synaptic weights are stored on the memristors of a reconfigurable crossbar array (MCA). Existing MCA-based neural network architectures use high power consuming voltage converters or operational amplifiers to generate the total synaptic current through each column of the crossbar array. This paper presents a low power MCA-based feedforward neural network architecture that uses a spintronic device per pair of columns to generate the synaptic current for each neuron. It is shown experimentally that the proposed architecture dissipates significantly less power compared to existing feedforward memristive neural network architectures.

Krishna Prasad Gnawali, Seyed Nima Mozaffari, Spyros Tragoudas
arXiv:1904.02183 · cs.ET, cs.AR · submitted Apr 3, 2019
abstract · pdf · 6 pages, 2 figures

add comment on HN