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DAVE: Deriving Automatically Verilog from English (arxiv.org)
2 points by matt_d on Sep 3, 2020 | hide | past | pdf | discuss on HN

In plain words: A text-generating AI system was trained to turn plain-English circuit descriptions into Verilog, the code compilers use to build chips, from beginner-level design tasks. It wrote correct code 94.8% of the time, on both simple and abstract designs engineers would otherwise translate by hand.

Abstract

While specifications for digital systems are provided in natural language, engineers undertake significant efforts to translate them into the programming languages understood by compilers for digital systems. Automating this process allows designers to work with the language in which they are most comfortable --the original natural language -- and focus instead on other downstream design challenges. We explore the use of state-of-the-art machine learning (ML) to automatically derive Verilog snippets from English via fine-tuning GPT-2, a natural language ML system. We describe our approach for producing a suitable dataset of novice-level digital design tasks and provide a detailed exploration of GPT-2, finding encouraging translation performance across our task sets (94.8% correct), with the ability to handle both simple and abstract design tasks.

Hammond Pearce, Benjamin Tan, Ramesh Karri
arXiv:2009.01026 · cs.SE, cs.CL, cs.LG, stat.ML · submitted Aug 27, 2020
abstract · pdf · html · 6 pages, 2 figures

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