In plain words: A compiler that lets intermediate results flow straight between computing steps instead of bouncing through memory, while automatically splitting, combining, and buffering the data. It beat the best FPGA chips and GPUs on latency, with nearly twice the energy efficiency of GPUs.
Abstract
Efficient execution of deep learning workloads on dataflow architectures is crucial for overcoming memory bottlenecks and maximizing performance. While streaming intermediate results between computation kernels can significantly improve efficiency, existing approaches struggle with inter-kernel correlations, external memory access management, and buffer optimization. In this work, we propose StreamTensor, a compiler framework that automatically constructs and optimizes stream-based dataflow accelerators. StreamTensor introduces a novel iterative tensor type system to explicitly encode stream layouts, enabling seamless kernel fusion, buffer allocation, and memory optimization. By systematically exploring three hierarchical design spaces, including tensor tiling, kernel fusion, and resource allocation, StreamTensor balances computational intensity, memory efficiency, and data streaming to maximize performance. Based on FPGA evaluations on Large Language Models (LLM), StreamTensor achieves up to 0.76x and 0.64x lower latency compared to the state-of-the-art FPGA LLM accelerators and GPUs, and up to 1.99x higher energy efficiency compared to GPUs, making it a promising approach for scalable dataflow-based deep learning acceleration.
Hanchen Ye, Deming Chen
arXiv:2509.13694 · cs.AR · submitted Sep 17, 2025 · updated Sep 23, 2025
abstract · pdf · html · Accepted by MICRO'25